Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-6 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
NOT—One's Complement Negation
Description
Performs a bitwise NOT operation (each 1 is set to 0, and each 0 is set to 1) on the
destination operand and stores the result in the destination operand location. The
destination operand can be a register or a memory location.
This instruction can be used with a LOCK prefix to allow the instruction to be
executed atomically.
In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefix
in the form of REX.R permits access to additional registers (R8-R15). Using a REX
prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at
the beginning of this section for encoding data and limits.
Operation
DEST ← NOT DEST;
Flags Affected
None.
Protected Mode Exceptions
#GP(0) If the destination operand points to a non-writable segment.
If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.
If the DS, ES, FS, or GS register contains a NULL segment
selector.
#SS(0) If a memory operand effective address is outside the SS
segment limit.
#PF(fault-code) If a page fault occurs.
Opcode
Instructio
n
64-Bit
Mode
Compat/
Leg Mode Description
F6 /2 NOT r/m8 Valid Valid Reverse each bit of r/m8.
REX + F6 /2 NOT r/m8* Valid N.E. Reverse each bit of r/m8.
F7 /2 NOT r/m16 Valid Valid Reverse each bit of r/m16.
F7 /2 NOT r/m32 Valid Valid Reverse each bit of r/m32.
REX.W + F7
/2
NOT r/m64 Valid N.E. Reverse each bit of r/m64.
NOTES:
* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix
is used: AH, BH, CH, DH.