Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

B-44 Vol. 2B
INSTRUCTION FORMATS AND ENCODINGS
qwordregister by immediate count 0100 100B 1100 0001 : 11 111 qwordreg :
imm8
memory by immediate count 0100 00XB 1100 000w : mod 111 r/m : imm8
memory8 by immediate count 0100 00XB 1100 0000 : mod 111 r/m : imm8
memory64 by immediate count 0100 10XB 1100 0001 : mod 111 r/m : imm8
SBB – Integer Subtraction with Borrow
register1 to register2 0100 0R0B 0001 100w : 11 reg1 reg2
byteregister1 to byteregister2 0100 0R0B 0001 1000 : 11 bytereg1
bytereg2
quadregister1 to quadregister2 0100 1R0B 0001 1001 : 11 quadreg1
quadreg2
register2 to register1 0100 0R0B 0001 101w : 11 reg1 reg2
byteregister2 to byteregister1 0100 0R0B 0001 1010 : 11 reg1 bytereg2
byteregister2 to byteregister1 0100 1R0B 0001 1011 : 11 reg1 bytereg2
memory to register 0100 0RXB 0001 101w : mod reg r/m
memory8 to byteregister 0100 0RXB 0001 1010 : mod bytereg r/m
memory64 to byteregister 0100 1RXB 0001 1011 : mod quadreg r/m
register to memory 0100 0RXB 0001 100w : mod reg r/m
byteregister to memory8 0100 0RXB 0001 1000 : mod reg r/m
quadregister to memory64 0100 1RXB 0001 1001 : mod reg r/m
immediate to register 0100 000B 1000 00sw : 11 011 reg : imm
immediate8 to byteregister 0100 000B 1000 0000 : 11 011 bytereg :
imm8
immediate32 to qwordregister 0100 100B 1000 0001 : 11 011 qwordreg :
imm32
immediate8 to qwordregister 0100 100B 1000 0011 : 11 011 qwordreg :
imm8
immediate to AL, AX, or EAX 0100 000B 0001 110w : imm
immediate32 to RAL 0100 1000 0001 1101 : imm32
immediate to memory 0100 00XB 1000 00sw : mod 011 r/m : imm
immediate8 to memory8 0100 00XB 1000 0000 : mod 011 r/m : imm8
immediate32 to memory64 0100 10XB 1000 0001 : mod 011 r/m : imm32
Table B-15. General Purpose Instruction Formats and Encodings
for 64-Bit Mode (Contd.)
Instruction and Format Encoding