Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B 5-27
VMX INSTRUCTION REFERENCE
VMXON—Enter VMX Operation
Description
Puts the logical processor in VMX operation with no current VMCS, blocks INIT
signals, disables A20M, and clears any address-range monitoring established by the
MONITOR instruction.
1
The operand of this instruction is a 4KB-aligned physical address (the VMXON
pointer) that references the VMXON region, which the logical processor may use to
support VMX operation. This operand is always 64 bits and is always in memory.
Operation
IF (register operand) or (CR4.VMXE = 0) or (CR0.PE = 0) or (RFLAGS.VM = 1) or
(IA32_EFER.LMA = 1 and CS.L = 0)
THEN #UD;
ELSIF not in VMX operation
THEN
IF (CPL > 0) or (in A20M mode) or
(the values of CR0 and CR4 are supported in VMX operation
2
) or
(bit 0 (lock bit) of IA32_FEATURE_CONTROL MSR is clear) or
(bit 2 of IA32_FEATURE_CONTROL MSR is clear)
THEN #GP(0);
ELSE
addr ← contents of 64-bit in-memory source operand;
IF addr is not 4KB-aligned or
(processor supports Intel 64 architecture and
addr sets any bits beyond the VMX physical-address width) or
(processor does not support Intel 64 architecture and
addr sets any bits in the range 63:32)
THEN VMfailInvalid;
ELSE
rev ← 32 bits located at physical address addr;
IF rev ≠ VMCS revision identifier supported by processor
THEN VMfailInvalid;
Opcode Instruction Description
F3 0F C7 /6 VMXON m64 Enter VMX root operation.
1. See the information on MONITOR/MWAIT in Chapter 7, “Multiple-Processor Management,” of the
Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A.
2. See Section 19.8 of the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Vol-
ume 3B.