Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B 4-399
INSTRUCTION SET REFERENCE, N-Z
WBINVD—Write Back and Invalidate Cache
Description
Writes back all modified cache lines in the processor’s internal cache to main memory
and invalidates (flushes) the internal caches. The instruction then issues a special-
function bus cycle that directs external caches to also write back modified data and
another bus cycle to indicate that the external caches should be invalidated.
After executing this instruction, the processor does not wait for the external caches
to complete their write-back and flushing operations before proceeding with instruc-
tion execution. It is the responsibility of hardware to respond to the cache write-back
and flush signals.
The WBINVD instruction is a privileged instruction. When the processor is running in
protected mode, the CPL of a program or procedure must be 0 to execute this
instruction. This instruction is also a serializing instruction (see “Serializing Instruc-
tions” in Chapter 8 of the Intel
®
64 and IA-32 Architectures Software Developer’s
Manual, Volume 3A).
In situations where cache coherency with main memory is not a concern, software
can use the INVD instruction.
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
IA-32 Architecture Compatibility
The WBINVD instruction is implementation dependent, and its function may be
implemented differently on future Intel 64 and IA-32 processors. The instruction is
not supported on IA-32 processors earlier than the Intel486 processor.
Operation
WriteBack(InternalCaches);
Flush(InternalCaches);
SignalWriteBack(ExternalCaches);
SignalFlush(ExternalCaches);
Continue; (* Continue execution *)
Flags Affected
None.
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
0F 09 WBINVD Valid Valid Write back and flush Internal
caches; initiate writing-back and
flushing of external caches.