Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B 4-191
INSTRUCTION SET REFERENCE, N-Z
PSUBQ—Subtract Packed Quadword Integers
Description
Subtracts the second operand (source operand) from the first operand (destination
operand) and stores the result in the destination operand. The source operand can be
a quadword integer stored in an MMX technology register or a 64-bit memory loca-
tion, or it can be two packed quadword integers stored in an XMM register or an
128-bit memory location. The destination operand can be a quadword integer stored
in an MMX technology register or two packed quadword integers stored in an XMM
register. When packed quadword operands are used, a SIMD subtract is performed.
When a quadword result is too large to be represented in 64 bits (overflow), the
result is wrapped around and the low 64 bits are written to the destination element
(that is, the carry is ignored).
Note that the PSUBQ instruction can operate on either unsigned or signed (two’s
complement notation) integers; however, it does not set bits in the EFLAGS register
to indicate overflow and/or a carry. To prevent undetected overflow conditions, soft-
ware must control the ranges of the values upon which it operates.
In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to
access additional registers (XMM8-XMM15).
Operation
PSUBQ instruction with 64-Bit operands:
DEST[63:0]
← DEST[63:0] − SRC[63:0];
PSUBQ instruction with 128-Bit operands:
DEST[63:0]
← DEST[63:0] − SRC[63:0];
DEST[127:64]
← DEST[127:64] − SRC[127:64];
Intel C/C++ Compiler Intrinsic Equivalents
PSUBQ __m64 _mm_sub_si64(__m64 m1, __m64 m2)
PSUBQ __m128i _mm_sub_epi64(__m128i m1, __m128i m2)
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
0F FB /r PSUBQ mm1, mm2/m64 Valid Valid Subtract quadword
integer in mm1 from mm2
/m64.
66 0F FB /r PSUBQ xmm1,
xmm2/m128
Valid Valid Subtract packed quadword
integers in xmm1 from
xmm2 /m128.