Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B 4-83

INSTRUCTION SET REFERENCE, N-Z

Intel C/C++ Compiler Intrinsic Equivalent

PHSUBSW __m64 _mm_hsubs_pi16 (__m64 a, __m64 b)

PHSUBSW __m128i _mm_hsubs_epi16 (__m128i a, __m128i b)

Protected Mode Exceptions

#GP(0) if a memory operand effective address is outside the CS, DS, ES,

FS or GS segments.

If not aligned on 16-byte boundary, regardless of segment

(128-bit operations only).

#SS(0) If a memory operand effective address is outside the SS

segment limit.

#PF(fault-code) If a page fault occurs.

#UD If CR0.EM = 1.

If CR4.OSFXSR(bit 9) = 0 (128-bit operations only).

If CPUID.SSSE3(ECX bit 9) = 0.

#NM If TS bit in CR0 is set.

#MF If there is a pending x87 FPU exception (64-bit operations only).

#AC(0) If alignment checking is enabled and unaligned memory refer-

ence is made while the current privilege level is 3 (64-bit opera-

tions only).

Real Mode Exceptions

#GP(0) If any part of the operand lies outside of the effective address

space from 0 to 0FFFFH.