Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-54 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
PANDN—Logical AND NOT
Description
Performs a bitwise logical NOT of the destination operand (first operand), then
performs a bitwise logical AND of the source operand (second operand) and the
inverted destination operand. The result is stored in the destination operand. The
source operand can be an MMX technology register or a 64-bit memory location or it
can be an XMM register or a 128-bit memory location. The destination operand can
be an MMX technology register or an XMM register. Each bit of the result is set to 1 if
the corresponding bit in the first operand is 0 and the corresponding bit in the second
operand is 1; otherwise, it is set to 0.
In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to
access additional registers (XMM8-XMM15).
Operation
DEST ← ((NOT DEST) AND SRC);
Intel C/C++ Compiler Intrinsic Equivalent
PANDN __m64 _mm_andnot_si64 (__m64 m1, __m64 m2)
PANDN _m128i _mm_andnot_si128 ( __m128i a, __m128i b)
Flags Affected
None.
Numeric Exceptions
None.
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
0F DF /r PANDN mm, mm/m64 Valid Valid Bitwise AND NOT of
mm/m64 and mm.
66 0F DF /r PANDN xmm1, xmm2/m128 Valid Valid Bitwise AND NOT of
xmm2/m128 and
xmm1.