Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B 4-307
INSTRUCTION SET REFERENCE, N-Z
SHUFPS—Shuffle Packed Single-Precision Floating-Point Values
Description
Moves two of the four packed single-precision floating-point values from the destina-
tion operand (first operand) into the low quadword of the destination operand;
moves two of the four packed single-precision floating-point values from the source
operand (second operand) into to the high quadword of the destination operand (see
Figure 4-14). The select operand (third operand) determines which values are
moved to the destination operand.
The source operand can be an XMM register or a 128-bit memory location. The desti-
nation operand is an XMM register. The select operand is an 8-bit immediate: bits 0
and 1 select the value to be moved from the destination operand to the low double-
word of the result, bits 2 and 3 select the value to be moved from the destination
operand to the second doubleword of the result, bits 4 and 5 select the value to be
moved from the source operand to the third doubleword of the result, and bits 6 and
7 select the value to be moved from the source operand to the high doubleword of
the result.
In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to
access additional registers (XMM8-XMM15).
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
0F C6 /r ib SHUFPS xmm1,
xmm2/m128, imm8
Valid Valid Shuffle packed single-precision
floating-point values selected by
imm8 from xmm1 and
xmm1/m128 to xmm1.
Figure 4-14. SHUFPS Shuffle Operation
X3 X2 X1 X0
Y3 Y2 Y1 Y0
Y3 ... Y0 Y3 ... Y0 X3 ... X0 X3 ... X0
DEST
SRC
DEST