Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-34 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
undetected overflow conditions, software must control the ranges of values oper-
ated on.
In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to
access additional registers (XMM8-XMM15).
Operation
PADDB instruction with 64-bit operands:
DEST[7:0] ← DEST[7:0] + SRC[7:0];
(* Repeat add operation for 2nd through 7th byte *)
DEST[63:56] ← DEST[63:56] + SRC[63:56];
PADDB instruction with 128-bit operands:
DEST[7:0] ← DEST[7:0] + SRC[7:0];
(* Repeat add operation for 2nd through 14th byte *)
DEST[127:120] ← DEST[111:120] + SRC[127:120];
PADDW instruction with 64-bit operands:
DEST[15:0] ← DEST[15:0] + SRC[15:0];
(* Repeat add operation for 2nd and 3th word *)
DEST[63:48] ← DEST[63:48] + SRC[63:48];
PADDW instruction with 128-bit operands:
DEST[15:0] ← DEST[15:0] + SRC[15:0];
(* Repeat add operation for 2nd through 7th word *)
DEST[127:112] ← DEST[127:112] + SRC[127:112];
PADDD instruction with 64-bit operands:
DEST[31:0] ← DEST[31:0] + SRC[31:0];
DEST[63:32] ← DEST[63:32] + SRC[63:32];
PADDD instruction with 128-bit operands:
DEST[31:0] ← DEST[31:0] + SRC[31:0];
(* Repeat add operation for 2nd and 3th doubleword *)
DEST[127:96] ← DEST[127:96] + SRC[127:96];
Intel C/C++ Compiler Intrinsic Equivalents
PADDB __m64 _mm_add_pi8(__m64 m1, __m64 m2)
PADDB __m128i_mm_add_epi8 (__m128ia,__m128ib )
PADDW __m64 _mm_addw_pi16(__m64 m1, __m64 m2)
PADDW __m128i _mm_add_epi16 ( __m128i a, __m128i b)
PADDD __m64 _mm_add_pi32(__m64 m1, __m64 m2)
PADDD __m128i _mm_add_epi32 ( __m128i a, __m128i b)