Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-230 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
SIZE ← 64: tempCOUNT ← COUNT AND 3FH;
ESAC;
(* RCL instruction operation *)
WHILE (tempCOUNT
≠ 0)
DO
tempCF ← MSB(DEST);
DEST ← (DEST
∗ 2) + CF;
CF ← tempCF;
tempCOUNT ← tempCOUNT – 1;
OD;
ELIHW;
IF COUNT
= 1
THEN OF ← MSB(DEST) XOR CF;
ELSE OF is undefined;
FI;
(* RCR instruction operation *)
IF COUNT
= 1
THEN OF ← MSB(DEST) XOR CF;
ELSE OF is undefined;
FI;
WHILE (tempCOUNT
≠ 0)
DO
tempCF ← LSB(SRC);
DEST ← (DEST / 2) + (CF * 2
SIZE
);
CF ← tempCF;
tempCOUNT ← tempCOUNT – 1;
OD;
(* ROL and ROR instructions *)
SIZE ← OperandSize;
CASE (determine count) OF
SIZE ← 8: tempCOUNT ← (COUNT AND 1FH) MOD 8; (* Mask count before MOD *)
SIZE ← 16: tempCOUNT ← (COUNT AND 1FH) MOD 16;
SIZE ← 32: tempCOUNT ← (COUNT AND 1FH) MOD 32;
SIZE ← 64: tempCOUNT ← (COUNT AND 1FH) MOD 64;
ESAC;
(* ROL instruction operation *)
IF (tempCOUNT > 0) (* Prevents updates to CF *)
WHILE (tempCOUNT
≠ 0)
DO