Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

B-88 Vol. 2B
INSTRUCTION FORMATS AND ENCODINGS
B.10 SSSE3 FORMATS AND ENCODING TABLE
The tables in this section provide SSSE3 formats and encodings. Some SSSE3
instructions require a mandatory prefix (66H) as part of the three-byte opcode.
These prefixes are included in the table below.
mem to xmmreg 11110010:00001111:00010010: mod xmmreg
r/m
MOVSHDUP—Move 128 bits representing 4
SP data from XMM2/Mem to XMM1 and
duplicate high
xmmreg2 to xmmreg1 11110011:00001111:00010110:11 xmmreg1
xmmreg2
mem to xmmreg 11110011:00001111:00010110: mod xmmreg
r/m
MOVSLDUP—Move 128 bits representing 4
SP data from XMM2/Mem to XMM1 and
duplicate low
xmmreg2 to xmmreg1 11110011:00001111:00010010:11 xmmreg1
xmmreg2
mem to xmmreg 11110011:00001111:00010010: mod xmmreg
r/m
Table B-31. Formats and Encodings for SSSE3 Instructions
Instruction and Format Encoding
PABSB—Packed Absolute
Value Bytes
mmreg to mmreg 0000 1111:0011 1000: 0001 1100:11 mmreg1 mmreg2
mem to mmreg 0000 1111:0011 1000: 0001 1100: mod mmreg r/m
xmmreg to xmmreg 0110 0110:0000 1111:0011 1000: 0001 1100:11 xmmreg1
xmmreg2
mem to xmmreg 0110 0110:0000 1111:0011 1000: 0001 1100: mod xmmreg r/m
PABSD—Packed Absolute
Value Double Words
mmreg to mmreg 0000 1111:0011 1000: 0001 1110:11 mmreg1 mmreg2
mem to mmreg 0000 1111:0011 1000: 0001 1110: mod mmreg r/m
Table B-30. Formats and Encodings for SSE3 Integer and Move Instructions (Contd.)
Instruction and Format Encoding