Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B B-57
INSTRUCTION FORMATS AND ENCODINGS
PMULHW – Packed multiplication, store
high word
mmxreg2 to mmxreg1 0000 1111:1110 0101: 11 mmxreg1 mmxreg2
memory to mmxreg 0000 1111:1110 0101: mod mmxreg r/m
PMULLW – Packed multiplication, store low
word
mmxreg2 to mmxreg1 0000 1111:1101 0101: 11 mmxreg1 mmxreg2
memory to mmxreg 0000 1111:1101 0101: mod mmxreg r/m
POR – Bitwise Or
mmxreg2 to mmxreg1 0000 1111:1110 1011: 11 mmxreg1 mmxreg2
memory to mmxreg 0000 1111:1110 1011: mod mmxreg r/m
PSLL
2
– Packed shift left logical
mmxreg1 by mmxreg2 0000 1111:1111 00gg: 11 mmxreg1 mmxreg2
mmxreg by memory 0000 1111:1111 00gg: mod mmxreg r/m
mmxreg by immediate 0000 1111:0111 00gg: 11 110 mmxreg: imm8
data
PSRA
2
– Packed shift right arithmetic
mmxreg1 by mmxreg2 0000 1111:1110 00gg: 11 mmxreg1 mmxreg2
mmxreg by memory 0000 1111:1110 00gg: mod mmxreg r/m
mmxreg by immediate 0000 1111:0111 00gg: 11 100 mmxreg: imm8
data
PSRL
2
– Packed shift right logical
mmxreg1 by mmxreg2 0000 1111:1101 00gg: 11 mmxreg1 mmxreg2
mmxreg by memory 0000 1111:1101 00gg: mod mmxreg r/m
mmxreg by immediate 0000 1111:0111 00gg: 11 010 mmxreg: imm8
data
PSUB – Subtract with wrap-around
mmxreg2 from mmxreg1 0000 1111:1111 10gg: 11 mmxreg1 mmxreg2
memory from mmxreg 0000 1111:1111 10gg: mod mmxreg r/m
PSUBS – Subtract signed with saturation
mmxreg2 from mmxreg1 0000 1111:1110 10gg: 11 mmxreg1 mmxreg2
memory from mmxreg 0000 1111:1110 10gg: mod mmxreg r/m
Table B-19. MMX Instruction Formats and Encodings (Contd.)
Instruction and Format Encoding