Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

B-12 Vol. 2B

INSTRUCTION FORMATS AND ENCODINGS

CMC – Complement Carry Flag 1111 0101

CMP – Compare Two Operands

register1 with register2 0011 100w : 11 reg1 reg2

register2 with register1 0011 101w : 11 reg1 reg2

memory with register 0011 100w : mod reg r/m

immediate with register 1000 00sw : 11 111 reg : immediate data

immediate with AL, AX, or EAX 0011 110w : immediate data

immediate with memory 1000 00sw : mod 111 r/m : immediate data

CMPS/CMPSB/CMPSW/CMPSD – Compare

String Operands

1010 011w

CMPXCHG – Compare and Exchange

register1, register2 0000 1111 : 1011 000w : 11 reg2 reg1

memory, register 0000 1111 : 1011 000w : mod reg r/m

CPUID – CPU Identification 0000 1111 : 1010 0010

CWD – Convert Word to Doubleword 1001 1001

CWDE – Convert Word to Doubleword 1001 1000

DAA – Decimal Adjust AL after Addition 0010 0111

DAS – Decimal Adjust AL after Subtraction 0010 1111

DEC – Decrement by 1

memory 1111 111w : mod 001 r/m

DIV – Unsigned Divide

AL, AX, or EAX by register 1111 011w : 11 110 reg

AL, AX, or EAX by memory 1111 011w : mod 110 r/m

ENTER – Make Stack Frame for High Level

Procedure

1100 1000 : 16-bit displacement : 8-bit level

(L)

HLT – Halt 1111 0100

IDIV – Signed Divide

Table B-13. General Purpose Instruction Formats and Encodings

for Non-64-Bit Modes (Contd.)

Instruction and Format Encoding