Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z
4-298 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
SHLD—Double Precision Shift Left
Description
The SHLD instruction is used for multi-precision shifts of 64 bits or more.
The instruction shifts the first operand (destination operand) to the left the number
of bits specified by the third operand (count operand). The second operand (source
operand) provides bits to shift in from the right (starting with bit 0 of the destination
operand).
The destination operand can be a register or a memory location; the source operand
is a register. The count operand is an unsigned integer that can be stored in an imme-
diate byte or in the CL register. If the count operand is CL, the shift count is the
logical AND of CL and a count mask. In non-64-bit modes and default 64-bit mode;
only bits 0 through 4 of the count are used. This masks the count to a value between
0 and 31. If a count is greater than the operand size, the result is undefined.
If the count is 1 or greater, the CF flag is filled with the last bit shifted out of the desti-
nation operand. For a 1-bit shift, the OF flag is set if a sign change occurred; other-
wise, it is cleared. If the count operand is 0, flags are not affected.
In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefix
in the form of REX.R permits access to additional registers (R8-R15). Using a REX
prefix in the form of REX.W promotes operation to 64 bits (upgrading the count mask
to 6 bits). See the summary chart at the beginning of this section for encoding data
and limits.
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
0F A4 SHLD r/m16, r16,
imm8
Valid Valid Shift r/m16 to left imm8
places while shifting bits
from r16 in from the right.
0F A5 SHLD r/m16, r16,
CL
Valid Valid Shift r/m16 to left CL
places while shifting bits
from r16 in from the right.
0F A4 SHLD r/m32, r32,
imm8
Valid Valid Shift r/m32 to left imm8
places while shifting bits
from r32 in from the right.
REX.W + 0F A4 SHLD r/m64, r64,
imm8
Valid N.E. Shift r/m64 to left imm8
places while shifting bits
from r64 in from the right.
0F A5 SHLD r/m32, r32,
CL
Valid Valid Shift r/m32 to left CL
places while shifting bits
from r32 in from the right.
REX.W + 0F A5 SHLD r/m64, r64,
CL
Valid N.E. Shift r/m64 to left CL
places while shifting bits
from r64 in from the right.