Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-134 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
POPA/POPAD—Pop All General-Purpose Registers
Description
Pops doublewords (POPAD) or words (POPA) from the stack into the general-purpose
registers. The registers are loaded in the following order: EDI, ESI, EBP, EBX, EDX,
ECX, and EAX (if the operand-size attribute is 32) and DI, SI, BP, BX, DX, CX, and AX
(if the operand-size attribute is 16). (These instructions reverse the operation of the
PUSHA/PUSHAD instructions.) The value on the stack for the ESP or SP register is
ignored. Instead, the ESP or SP register is incremented after each register is loaded.
The POPA (pop all) and POPAD (pop all double) mnemonics reference the same
opcode. The POPA instruction is intended for use when the operand-size attribute is
16 and the POPAD instruction for when the operand-size attribute is 32. Some
assemblers may force the operand size to 16 when POPA is used and to 32 when
POPAD is used (using the operand-size override prefix [66H] if necessary). Others
may treat these mnemonics as synonyms (POPA/POPAD) and use the current setting
of the operand-size attribute to determine the size of values to be popped from the
stack, regardless of the mnemonic used. (The D flag in the current code segment’s
segment descriptor determines the operand-size attribute.)
This instruction executes as described in non-64-bit modes. It is not valid in 64-bit
mode.
Operation
IF 64-Bit Mode
THEN
#UD;
ELSE
IF OperandSize
= 32 (* Instruction = POPAD *)
THEN
EDI ← Pop();
ESI ← Pop();
EBP ← Pop();
Increment ESP by 4; (* Skip next 4 bytes of stack *)
EBX ← Pop();
EDX ← Pop();
ECX ← Pop();
EAX ← Pop();
Opcode Instruction
64-Bit
Mode
Compat/
Leg Mode Description
61 POPA Invalid Valid Pop DI, SI, BP, BX, DX, CX, and AX.
61 POPAD Invalid Valid Pop EDI, ESI, EBP, EBX, EDX, ECX,
and EAX.