Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

B-64 Vol. 2B
INSTRUCTION FORMATS AND ENCODINGS
MOVUPS—Move Unaligned Packed
Single-Precision Floating-Point Values
xmmreg2 to xmmreg1 0000 1111:0001 0000:11 xmmreg2 xmmreg1
mem to xmmreg1 0000 1111:0001 0000: mod xmmreg r/m
xmmreg1 to xmmreg2 0000 1111:0001 0001:11 xmmreg1 xmmreg2
xmmreg1 to mem 0000 1111:0001 0001: mod xmmreg r/m
MULPS—Multiply Packed Single-
Precision Floating-Point Values
xmmreg to xmmreg 0000 1111:0101 1001:11 xmmreg1 xmmreg2
mem to xmmreg 0000 1111:0101 1001: mod xmmreg rm
MULSS—Multiply Scalar Single-Precision
Floating-Point Values
xmmreg to xmmreg 1111 0011:0000 1111:0101 1001:11 xmmreg1
xmmreg2
mem to xmmreg 1111 0011:0000 1111:0101 1001: mod xmmreg
r/m
ORPS—Bitwise Logical OR of Single-
Precision Floating-Point Values
xmmreg to xmmreg 0000 1111:0101 0110:11 xmmreg1 xmmreg2
mem to xmmreg 0000 1111:0101 0110 mod xmmreg r/m
RCPPS—Compute Reciprocals of Packed
Single-Precision Floating-Point Values
xmmreg to xmmreg 0000 1111:0101 0011:11 xmmreg1 xmmreg2
mem to xmmreg 0000 1111:0101 0011: mod xmmreg r/m
RCPSS—Compute Reciprocals of Scalar
Single-Precision Floating-Point Value
xmmreg to xmmreg 1111 0011:0000 1111:01010011:11 xmmreg1
xmmreg2
mem to xmmreg 1111 0011:0000 1111:01010011: mod xmmreg r/m
RSQRTPS—Compute Reciprocals of
Square Roots of Packed Single-
Precision Floating-Point Values
xmmreg to xmmreg 0000 1111:0101 0010:11 xmmreg1 xmmreg2
mem to xmmreg 0000 1111:0101 0010 mode xmmreg r/m
Table B-21. Formats and Encodings of SSE Floating-Point Instructions (Contd.)
Instruction and Format Encoding