Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-392 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
DEST[127:96] ← SRC[63:32];
Intel C/C++ Compiler Intrinsic Equivalent
UNPCKLPS __m128 _mm_unpacklo_ps(__m128 a, __m128 b)
SIMD Floating-Point Exceptions
None.
Protected Mode Exceptions
#GP(0) For an illegal memory operand effective address in the CS, DS,
ES, FS or GS segments.
If a memory operand is not aligned on a 16-byte boundary,
regardless of segment.
#SS(0) For an illegal address in the SS segment.
#PF(fault-code) For a page fault.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:EDX.SSE[bit 25] = 0.
Real-Address Mode Exceptions
#GP(0) If a memory operand is not aligned on a 16-byte boundary,
regardless of segment.
If any part of the operand lies outside the effective address
space from 0 to FFFFH.
#NM If CR0.TS[bit 3] = 1.
#UD If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:EDX.SSE[bit 25] = 0.
Virtual-8086 Mode Exceptions
Same exceptions as in Real Address Mode
#PF(fault-code) For a page fault.
Compatibility Mode Exceptions
Same exceptions as in Protected Mode.