Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B B-49
INSTRUCTION FORMATS AND ENCODINGS
byteregister from memory8 0100 0RXB 0010 1000 : mod bytereg r/m
qwordregister from memory8 0100 1RXB 0010 1000 : mod qwordreg r/m
immediate from register 0100 000B 1000 00sw : 11 101 reg : imm
immediate8 from byteregister 0100 000B 1000 0000 : 11 101 bytereg :
imm8
immediate32 from qwordregister 0100 100B 1000 0001 : 11 101 qwordreg :
imm32
immediate8 from qwordregister 0100 100B 1000 0011 : 11 101 qwordreg :
imm8
immediate from AL, AX, or EAX 0100 000B 0010 110w : imm
immediate32 from RAX 0100 1000 0010 1101 : imm32
immediate from memory 0100 00XB 1000 00sw : mod 101 r/m : imm
immediate8 from memory8 0100 00XB 1000 0000 : mod 101 r/m : imm8
immediate32 from memory64 0100 10XB 1000 0001 : mod 101 r/m : imm32
immediate8 from memory64 0100 10XB 1000 0011 : mod 101 r/m : imm8
SWAPGS – Swap GS Base Register
GS base register value for value in MSR
C0000102H
0000 1111 0000 0001 [this one incomplete]
SYSCALL – Fast System Call
fast call to privilege level 0 system procedures 0000 1111 0000 0101
SYSRET – Return From Fast System Call
return from fast system call 0000 1111 0000 0111
TEST – Logical Compare
register1 and register2 0100 0R0B 1000 010w : 11 reg1 reg2
byteregister1 and byteregister2 0100 0R0B 1000 0100 : 11 bytereg1
bytereg2
qwordregister1 and qwordregister2 0100 1R0B 1000 0101 : 11 qwordreg1
qwordreg2
memory and register 0100 0R0B 1000 010w : mod reg r/m
memory8 and byteregister 0100 0RXB 1000 0100 : mod bytereg r/m
memory64 and qwordregister 0100 1RXB 1000 0101 : mod qwordreg r/m
immediate and register 0100 000B 1111 011w : 11 000 reg : imm
Table B-15. General Purpose Instruction Formats and Encodings
for 64-Bit Mode (Contd.)
Instruction and Format Encoding