Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B A-3
OPCODE MAP
following values: a base register, an index register, a scaling factor, and a
displacement.
R The R/M field of the ModR/M byte may refer only to a general register (for
example, MOV (0F20-0F23)).
S The reg field of the ModR/M byte selects a segment register (for example,
MOV (8C,8E)).
U The R/M field of the ModR/M byte selects a 128-bit XMM register.
V The reg field of the ModR/M byte selects a 128-bit XMM register.
W A ModR/M byte follows the opcode and specifies the operand. The operand is
either a 128-bit XMM register or a memory address. If it is a memory
address, the address is computed from a segment register and any of the
following values: a base register, an index register, a scaling factor, and a
displacement.
X Memory addressed by the DS:rSI register pair (for example, MOVS, CMPS,
OUTS, or LODS).
Y Memory addressed by the ES:rDI register pair (for example, MOVS, CMPS,
INS, STOS, or SCAS).
A.2.2 Codes for Operand Type
The following abbreviations are used to document operand types:
a Two one-word operands in memory or two double-word operands in memory,
depending on operand-size attribute (used only by the BOUND instruction).
b Byte, regardless of operand-size attribute.
c Byte or word, depending on operand-size attribute.
d Doubleword, regardless of operand-size attribute.
dq Double-quadword, regardless of operand-size attribute.
p 32-bit or 48-bit pointer, depending on operand-size attribute.
pi Quadword MMX technology register (for example: mm0).
ps 128-bit packed single-precision floating-point data.
q Quadword, regardless of operand-size attribute.
s 6-byte or 10-byte pseudo-descriptor.
ss Scalar element of a 128-bit packed single-precision floating data.
si Doubleword integer register (for example: eax).
v Word, doubleword or quadword (in 64-bit mode), depending on operand-size
attribute.
w Word, regardless of operand-size attribute.
z Word for 16-bit operand-size or doubleword for 32 or 64-bit operand-size.