Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

B-52 Vol. 2B
INSTRUCTION FORMATS AND ENCODINGS
immediate8 to byteregister 0100 000B 1000 0000 : 11 110 bytereg :
imm8
immediate32 to qwordregister 0100 100B 1000 0001 : 11 110 qwordreg :
imm32
immediate8 to qwordregister 0100 100B 1000 0011 : 11 110 qwordreg :
imm8
immediate to AL, AX, or EAX 0100 000B 0011 010w : imm
immediate to RAX 0100 1000 0011 0101 : immediate data
immediate to memory 0100 00XB 1000 00sw : mod 110 r/m : imm
immediate8 to memory8 0100 00XB 1000 0000 : mod 110 r/m : imm8
immediate32 to memory64 0100 10XB 1000 0001 : mod 110 r/m : imm32
immediate8 to memory64 0100 10XB 1000 0011 : mod 110 r/m : imm8
Prefix Bytes
address size 0110 0111
LOCK 1111 0000
operand size 0110 0110
CS segment override 0010 1110
DS segment override 0011 1110
ES segment override 0010 0110
FS segment override 0110 0100
GS segment override 0110 0101
SS segment override 0011 0110
Table B-15. General Purpose Instruction Formats and Encodings
for 64-Bit Mode (Contd.)
Instruction and Format Encoding