Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-188 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
The PSUBD instruction subtracts packed doubleword integers. When an individual
result is too large or too small to be represented in a doubleword, the result is
wrapped around and the low 32 bits are written to the destination element.
Note that the PSUBB, PSUBW, and PSUBD instructions can operate on either
unsigned or signed (two's complement notation) packed integers; however, it does
not set bits in the EFLAGS register to indicate overflow and/or a carry. To prevent
undetected overflow conditions, software must control the ranges of values upon
which it operates.
In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to
access additional registers (XMM8-XMM15).
Operation
PSUBB instruction with 64-bit operands:
DEST[7:0] ← DEST[7:0]
− SRC[7:0];
(* Repeat subtract operation for 2nd through 7th byte *)
DEST[63:56] ← DEST[63:56]
− SRC[63:56];
PSUBB instruction with 128-bit operands:
DEST[7:0] ← DEST[7:0] − SRC[7:0];
(* Repeat subtract operation for 2nd through 14th byte *)
DEST[127:120] ← DEST[111:120]
− SRC[127:120];
PSUBW instruction with 64-bit operands:
DEST[15:0] ← DEST[15:0]
− SRC[15:0];
(* Repeat subtract operation for 2nd and 3rd word *)
DEST[63:48] ← DEST[63:48]
− SRC[63:48];
PSUBW instruction with 128-bit operands:
DEST[15:0] ← DEST[15:0]
− SRC[15:0];
(* Repeat subtract operation for 2nd through 7th word *)
DEST[127:112] ← DEST[127:112]
− SRC[127:112];
PSUBD instruction with 64-bit operands:
DEST[31:0] ← DEST[31:0] − SRC[31:0];
DEST[63:32] ← DEST[63:32]
− SRC[63:32];
PSUBD instruction with 128-bit operands:
DEST[31:0] ← DEST[31:0]
− SRC[31:0];
(* Repeat subtract operation for 2nd and 3rd doubleword *)
DEST[127:96] ← DEST[127:96]
− SRC[127:96];