Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

INDEX
INDEX-4 Vol. 2B
FRSTOR instruction, 3-368
FS register, 3-522
FSAVE instruction, 3-371
FSAVE/FNSAVE instructions, 3-368
FSCALE instruction, 3-375
FSIN instruction, 3-377
FSINCOS instruction, 3-379
FSQRT instruction, 3-382
FST instruction, 3-384
FSTCW instruction, 3-387
FSTENV instruction, 3-390
FSTP instruction, 3-384
FSTSW instruction, 3-393
FSUB instruction, 3-396
FSUBP instruction, 3-396
FSUBR instruction, 3-400
FSUBRP instruction, 3-400
FTST instruction, 3-404
FUCOM instruction, 3-406
FUCOMI instruction, 3-307
FUCOMIP instruction, 3-307
FUCOMP instruction, 3-406
FUCOMPP instruction, 3-406
FXAM instruction, 3-409
FXCH instruction, 3-411
FXRSTOR instruction, 3-413
CPUID flag, 3-175
FXSAVE instruction, 3-416
CPUID flag, 3-175
FXTRACT instruction, 3-375, 3-426
FYL2X instruction, 3-428
FYL2XP1 instruction, 3-430
G
GDT (global descriptor table), 3-534, 3-537
GDTR (global descriptor table register), 3-534, 4-295
General-purpose instructions
64-bit encodings, B-24
non-64-bit encodings, B-9
General-purpose registers
moving value to and from, 3-592
popping all, 4-134
pushing all, 4-217
GS register, 3-522
H
HADDPD instruction, 3-432, 3-433
HADDPS instruction, 3-435
Hexadecimal numbers, 1-5
HLT instruction, 3-439
HSUBPD instruction, 3-441
HSUBPS instruction, 3-444
Hyper-Threading Technology
CPUID flag, 3-176
I
IA-32e mode
CPUID flag, 3-166
introduction, 2-9
see 64-bit mode
see compatibility mode
IA32_SYSENTER_CS MSR, 4-365, 4-368, 4-369
IA32_SYSENTER_EIP MSR, 4-365
IA32_SYSENTER_ESP MSR, 4-365
IDIV instruction, 3-448
IDT (interrupt descriptor table), 3-466, 3-534
IDTR (interrupt descriptor table register), 3-534,
4-310
IF (interrupt enable) flag, EFLAGS register, 3-109,
4-332
Immediate operands, 2-4
IMUL instruction, 3-452
IN instruction, 3-457
INC instruction, 3-459, 3-541
Index (operand addressing), 2-4
Initialization x87 FPU, 3-330
INS instruction, 3-461, 4-250
INSB instruction, 3-461
INSD instruction, 3-461
instruction encodings, B-88
Instruction format
base field, 2-4
description of reference information, 3-1
displacement, 2-4
immediate, 2-4
index field, 2-4
Mod field, 2-4
ModR/M byte, 2-4
opcode, 2-3
operands, 1-5
prefixes, 2-2
reg/opcode field, 2-4
r/m field, 2-4
scale field, 2-4
SIB byte, 2-4
See also: machine instructions, opcodes
Instruction reference, nomenclature, 3-1
Instruction set, reference, 3-1
INSW instruction, 3-461
INT 3 instruction, 3-465
Integer, storing, x87 FPU data type, 3-332
Intel 64 architecture
definition of, 1-2
instruction format, 2-1
relation to IA-32, 1-2
Intel NetBurst microarchitecture, 1-2
Intel Xeon processor, 1-1
Inter-privilege level
call, CALL instruction, 3-87
return, RET instruction, 4-253