Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B B-99
INSTRUCTION FORMATS AND ENCODINGS
FIMUL
ST(0) ← ST(0) × 16-bit memory 11011 110 : mod 001 r/m
ST(0) ← ST(0) × 32-bit memory 11011 010 : mod 001 r/m
FINCSTP – Increment Stack Pointer 11011 001 : 1111 0111
FINIT – Initialize Floating-Point Unit
FIST – Store Integer
16-bit memory 11011 111 : mod 010 r/m
32-bit memory 11011 011 : mod 010 r/m
FISTP – Store Integer and Pop
16-bit memory 11011 111 : mod 011 r/m
32-bit memory 11011 011 : mod 011 r/m
64-bit memory 11011 111 : mod 111 r/m
FISUB
ST(0) ← ST(0) - 16-bit memory 11011 110 : mod 100 r/m
ST(0) ← ST(0) - 32-bit memory 11011 010 : mod 100 r/m
FISUBR
ST(0) ← 16-bit memory − ST(0) 11011 110 : mod 101 r/m
ST(0) ← 32-bit memory − ST(0) 11011 010 : mod 101 r/m
FLD – Load Real
32-bit memory 11011 001 : mod 000 r/m
64-bit memory 11011 101 : mod 000 r/m
80-bit memory 11011 011 : mod 101 r/m
ST(i) 11011 001 : 11 000 ST(i)
FLD1 – Load +1.0 into ST(0) 11011 001 : 1110 1000
FLDCW – Load Control Word 11011 001 : mod 101 r/m
FLDENV – Load FPU Environment 11011 001 : mod 100 r/m
FLDL2E – Load log
2
(ε) into ST(0) 11011 001 : 1110 1010
FLDL2T – Load log
2
(10) into ST(0) 11011 001 : 1110 1001
FLDLG2 – Load log
10
(2) into ST(0) 11011 001 : 1110 1100
FLDLN2 – Load log
ε
(2) into ST(0) 11011 001 : 1110 1101
FLDPI – Load π into ST(0) 11011 001 : 1110 1011
Table B-34. Floating-Point Instruction Formats and Encodings (Contd.)
Instruction and Format Encoding