Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B B-61
INSTRUCTION FORMATS AND ENCODINGS
mem to xmmreg, imm8 1111 0011:0000 1111:1100 0010: mod xmmreg
r/m: imm8
COMISS—Compare Scalar Ordered
Single-Precision Floating-Point Values
and Set EFLAGS
xmmreg to xmmreg 0000 1111:0010 1111:11 xmmreg1 xmmreg2
mem to xmmreg 0000 1111:0010 1111: mod xmmreg r/m
CVTPI2PS—Convert Packed Doubleword
Integers to Packed Single-Precision
Floating-Point Values
mmreg to xmmreg 0000 1111:0010 1010:11 xmmreg1 mmreg1
mem to xmmreg 0000 1111:0010 1010: mod xmmreg r/m
CVTPS2PI—Convert Packed Single-
Precision Floating-Point Values to
Packed Doubleword Integers
xmmreg to mmreg 0000 1111:0010 1101:11 mmreg1 xmmreg1
mem to mmreg 0000 1111:0010 1101: mod mmreg r/m
CVTSI2SS—Convert Doubleword Integer
to Scalar Single-Precision Floating-Point
Value
r32 to xmmreg1 1111 0011:0000 1111:00101010:11 xmmreg r32
mem to xmmreg 1111 0011:0000 1111:00101010: mod xmmreg r/m
CVTSS2SI—Convert Scalar Single-
Precision Floating-Point Value to
Doubleword Integer
xmmreg to r32 1111 0011:0000 1111:0010 1101:11 r32 xmmreg
mem to r32 1111 0011:0000 1111:0010 1101: mod r32 r/m
CVTTPS2PI—Convert with Truncation
Packed Single-Precision Floating-Point
Values to Packed Doubleword Integers
xmmreg to mmreg 0000 1111:0010 1100:11 mmreg1 xmmreg1
mem to mmreg 0000 1111:0010 1100: mod mmreg r/m
CVTTSS2SI—Convert with Truncation
Scalar Single-Precision Floating-Point
Value to Doubleword Integer
xmmreg to r32 1111 0011:0000 1111:0010 1100:11 r32 xmmreg1
Table B-21. Formats and Encodings of SSE Floating-Point Instructions (Contd.)
Instruction and Format Encoding