Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B 4-395
INSTRUCTION SET REFERENCE, N-Z
or (SegmentDescriptor(Type)
≠ conforming code segment)
and (CPL > DPL) or (RPL > DPL)
THEN
ZF ← 0;
ELSE
IF ((Instruction
= VERR) and (Segment readable))
or ((Instruction
= VERW) and (Segment writable))
THEN
ZF ← 1;
FI;
FI;
Flags Affected
The ZF flag is set to 1 if the segment is accessible and readable (VERR) or writable
(VERW); otherwise, it is set to 0.
Protected Mode Exceptions
The only exceptions generated for these instructions are those related to illegal
addressing of the source operand.
#GP(0) If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.
If the DS, ES, FS, or GS register is used to access memory and it
contains a NULL segment selector.
#SS(0) If a memory operand effective address is outside the SS
segment limit.
#PF(fault-code) If a page fault occurs.
#AC(0) If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
Real-Address Mode Exceptions
#UD The VERR and VERW instructions are not recognized in real-
address mode.
Virtual-8086 Mode Exceptions
#UD The VERR and VERW instructions are not recognized in virtual-
8086 mode.
Compatibility Mode Exceptions
Same exceptions as in Protected Mode.