Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B B-55
INSTRUCTION FORMATS AND ENCODINGS
B.5.2 MMX Technology and General-Purpose Register Fields
(mmxreg and reg)
When MMX technology registers (mmxreg) are used as operands, they are encoded
in the ModR/M byte in the reg field (bits 5, 4, and 3) and/or the R/M field (bits 2, 1,
and 0).
If an MMX instruction operates on a general-purpose register (reg), the register is
encoded in the R/M field of the ModR/M byte.
B.5.3 MMX Instruction Formats and Encodings Table
Table B-19 shows the formats and encodings of the integer instructions.
Table B-19. MMX Instruction Formats and Encodings
Instruction and Format Encoding
EMMS – Empty MMX technology state 0000 1111:01110111
MOVD – Move doubleword
reg to mmreg 0000 1111:0110 1110: 11 mmxreg reg
reg from mmxreg 0000 1111:0111 1110: 11 mmxreg reg
mem to mmxreg 0000 1111:0110 1110: mod mmxreg r/m
mem from mmxreg 0000 1111:0111 1110: mod mmxreg r/m
MOVQ – Move quadword
mmxreg2 to mmxreg1 0000 1111:0110 1111: 11 mmxreg1 mmxreg2
mmxreg2 from mmxreg1 0000 1111:0111 1111: 11 mmxreg1 mmxreg2
mem to mmxreg 0000 1111:0110 1111: mod mmxreg r/m
mem from mmxreg 0000 1111:0111 1111: mod mmxreg r/m
PACKSSDW
1
– Pack dword to word data
(signed with saturation)
mmxreg2 to mmxreg1 0000 1111:0110 1011: 11 mmxreg1 mmxreg2
memory to mmxreg 0000 1111:0110 1011: mod mmxreg r/m
PACKSSWB
1
– Pack word to byte data
(signed with saturation)
mmxreg2 to mmxreg1 0000 1111:0110 0011: 11 mmxreg1 mmxreg2
memory to mmxreg 0000 1111:0110 0011: mod mmxreg r/m
PACKUSWB
1
– Pack word to byte data
(unsigned with saturation)
mmxreg2 to mmxreg1 0000 1111:0110 0111: 11 mmxreg1 mmxreg2