Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

B-4 Vol. 2B

INSTRUCTION FORMATS AND ENCODINGS

B.1.4.2 Reg Field (reg) for 64-Bit Mode

Just like in non-64-bit modes, the reg field in the ModR/M byte specifies a general-

purpose register operand. The group of registers specified is modified by the pres-

ence of and state of the w bit in an encoding (refer to Section B.1.4.3). Table B-4

shows the encoding of the reg field when the w bit is not present in an encoding;

Table B-5 shows the encoding of the reg field when the w bit is present.

Table B-3. Encoding of reg Field When w Field is Present in Instruction

During 16-Bit Data Operations

During 32-Bit Data Operations

Function of w Field Function of w Field

reg When w = 0 When w = 1 reg When w = 0 When w = 1

000 AL AX 000 AL EAX

001 CL CX 001 CL ECX

010 DL DX 010 DL EDX

011 BL BX 011 BL EBX

100 AH SP 100 AH ESP

101 CH BP 101 CH EBP

110 DH SI 110 DH ESI

111 BH DI 111 BH EDI

Table B-4. Encoding of reg Field When w Field is Not Present in Instruction

reg Field

during

16-Bit Data Operations

during

32-Bit Data Operations

during

64-Bit Data Operations

000 AX EAX RAX

001 CX ECX RCX

010 DX EDX RDX

011 BX EBX RBX

100 SP ESP RSP

101 BP EBP RBP

110 SI ESI RSI

111 DI EDI RDI