Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

B-74 Vol. 2B
INSTRUCTION FORMATS AND ENCODINGS
MINPD—Return Minimum Packed
Double-Precision Floating-Point
Values
xmmreg to xmmreg 0110 0110:0000 1111:0101 1101:11 xmmreg1
xmmreg2
mem to xmmreg 0110 0110:0000 1111:0101 1101: mod xmmreg r/m
MINSD—Return Minimum Scalar
Double-Precision Floating-Point Value
xmmreg to xmmreg 1111 0010:0000 1111:0101 1101:11 xmmreg1
xmmreg2
mem to xmmreg 1111 0010:0000 1111:0101 1101: mod xmmreg r/m
MOVAPD—Move Aligned Packed
Double-Precision Floating-Point
Values
xmmreg2 to xmmreg1 0110 0110:0000 1111:0010 1001:11 xmmreg2
xmmreg1
mem to xmmreg1 0110 0110:0000 1111:0010 1001: mod xmmreg r/m
xmmreg1 to xmmreg2 0110 0110:0000 1111:0010 1000:11 xmmreg1
xmmreg2
xmmreg1 to mem 0110 0110:0000 1111:0010 1000: mod xmmreg r/m
MOVHPD—Move High Packed Double-
Precision Floating-Point Values
mem to xmmreg 0110 0110:0000 1111:0001 0111: mod xmmreg r/m
xmmreg to mem 0110 0110:0000 1111:0001 0110: mod xmmreg r/m
MOVLPD—Move Low Packed Double-
Precision Floating-Point Values
mem to xmmreg 0110 0110:0000 1111:0001 0011: mod xmmreg r/m
xmmreg to mem 0110 0110:0000 1111:0001 0010: mod xmmreg r/m
MOVMSKPD—Extract Packed Double-
Precision Floating-Point Sign Mask
xmmreg to r32 0110 0110:0000 1111:0101 0000:11 r32 xmmreg
MOVSD—Move Scalar Double-
Precision Floating-Point Values
xmmreg2 to xmmreg1 1111 0010:0000 1111:0001 0001:11 xmmreg2
xmmreg1
mem to xmmreg1 1111 0010:0000 1111:0001 0001: mod xmmreg r/m
Table B-25. Formats and Encodings of SSE2 Floating-Point Instructions (Contd.)
Instruction and Format Encoding