Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B A-13
OPCODE MAP
Table A-3. Two-byte Opcode Map: 80H — F7H (First Byte is 0FH) *
0 1234567
8 Jcc
f64
, Jz - Long-displacement jump on condition
O NO B/CNAE AE/NB/NC E/Z NE/NZ BE/NA A/NBE
9 SETcc, Eb - Byte Set on condition
O NO B/C/NAE AE/NB/NC E/Z NE/NZ BE/NA A/NBE
APUSH
d64
FS
POP
d64
FS
CPUID BT
Ev, Gv
SHLD
Ev, Gv, Ib
SHLD
Ev, Gv, CL
B CMPXCHG LSS
Gv, Mp
BTR
Ev, Gv
LFS
Gv, Mp
LGS
Gv, Mp
MOVZX
Eb, Gb Ev, Gv Gv, Eb Gv, Ew
CXADD
Eb, Gb
XADD
Ev, Gv
cmpps
Vps, Wps, Ib
cmpss (F3)
Vss, Wss, Ib
cmppd (66)
Vpd, Wpd, Ib
cmpsd (F2)
Vsd, Wsd, Ib
movnti
Md/q, Gd/q
pinsrw
Pq, Ew, Ib
pinsrw (66)
Vdq, Ew, Ib
pextrw
Gd, Nq, Ib
pextrw (66)
Gd, Udq, Ib
shufps
Vps, Wps, Ib
shufpd (66)
Vpd, Wpd, Ib
Grp 9
1A
D addsubps(F2)
Vps, Wps
addsubpd(66)
Vpd, Wpd
psrlw
Pq, Qq
psrlw (66)
Vdq, Wdq
psrld
Pq, Qq
psrld (66)
Vdq, Wdq
psrlq
Pq, Qq
psrlq (66)
Vdq, Wdq
paddq
Pq, Qq
paddq (66)
Vdq, Wdq
pmullw
Pq, Qq
pmullw (66)
Vdq, Wdq
movq (66)
Wq, Vq
movq2dq (F3)
Vdq, Nq
movdq2q (F2)
Pq, Uq
pmovmskb
Gd, Nq
pmovmksb (66)
Gd, Udq
E pavgb
Pq, Qq
pavgb (66)
Vdq, Wdq
psraw
Pq, Qq
psraw (66)
Vdq, Wdq
psrad
Pq, Qq
psrad (66)
Vdq, Wdq
pavgw
Pq, Qq
pavgw (66)
Vdq, Wdq
pmulhuw
Pq, Qq
pmulhuw (66)
Vdq, Wdq
pmulhw
Pq, Qq
pmulhw (66)
Vdq, Wdq
cvtpd2dq (F2)
Vdq, Wpd
cvttpd2dq (66)
Vdq, Wpd
cvtdq2pd (F3)
Vpd, Wdq
movntq
Mq, Pq
movntdq (66)
Mdq, Vdq
F lddqu (F2)
Vdq, Mdq
psllw
Pq, Qq
psllw (66)
Vdq, Wdq
pslld
Pq, Qq
pslld (66)
Vdq, Wdq
psllq
Pq, Qq
psllq (66)
Vdq, Wdq
pmuludq
Pq, Qq
pmuludq (66)
Vdq, Wdq
pmaddwd
Pq, Qq
pmaddwd (66)
Vdq, Wdq
psadbw
Pq, Qq
psadbw (66)
Vdq, Wdq
maskmovq
Pq, Nq
maskmovdqu
(66)
Vdq, Udq