Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B B-7

INSTRUCTION FORMATS AND ENCODINGS

B.1.4.6 Special-Purpose Register (eee) Field

When control or debug registers are referenced in an instruction they are encoded in

the eee field, located in bits 5 though 3 of the ModR/M byte (an alternate encoding of

the sreg field). See Table B-9.

B.1.4.7 Condition Test (tttn) Field

For conditional instructions (such as conditional jumps and set on condition), the

condition test field (tttn) is encoded for the condition being tested. The ttt part of the

field gives the condition to test and the n part indicates whether to use the condition

(n = 0) or its negation (n = 1).

• For 1-byte primary opcodes, the tttn field is located in bits 3, 2, 1, and 0 of the

opcode byte.

• For 2-byte primary opcodes, the tttn field is located in bits 3, 2, 1, and 0 of the

second opcode byte.

Table B-10 shows the encoding of the tttn field.

Table B-9. Encoding of Special-Purpose Register (eee) Field

eee Control Register Debug Register

000 CR0 DR0

001 Reserved

DR1

010 CR2 DR2

011 CR3 DR3

100 CR4 Reserved

101 Reserved Reserved

110 Reserved DR6

111 Reserved DR7

NOTES:

1. Do not use reserved encodings.