Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B B-93
INSTRUCTION FORMATS AND ENCODINGS
CVTSI2SS—Convert Doubleword Integer to
Scalar Single-Precision Floating-Point Value
r32 to xmmreg1 0100 0R0B 1111 0011:0000 1111:0010
1010:11 xmmreg r32
r64 to xmmreg1 0100 1R0B 1111 0011:0000 1111:0010
1010:11 xmmreg r64
mem to xmmreg 0100 0RXB 1111 0011:0000 1111:0010
1010: mod xmmreg r/m
mem64 to xmmreg 0100 1RXB 1111 0011:0000 1111:0010
1010: mod xmmreg r/m
CVTSI2SD—Convert Doubleword Integer to
Scalar Double-Precision Floating-Point Value
r32 to xmmreg1 0100 0R0B 1111 0010:0000 1111:0010
1010:11 xmmreg r32
r64 to xmmreg1 0100 1R0B 1111 0010:0000 1111:0010
1010:11 xmmreg r64
mem to xmmreg 0100 0RXB 1111 0010:0000 1111:00101
010: mod xmmreg r/m
mem64 to xmmreg 0100 1RXB 1111 0010:0000 1111:0010
1010: mod xmmreg r/m
CVTSS2SI—Convert Scalar Single-Precision
Floating-Point Value to Doubleword Integer
xmmreg to r32 0100 0R0B 1111 0011:0000 1111:0010
1101:11 r32 xmmreg
xmmreg to r64 0100 1R0B 1111 0011:0000 1111:0010
1101:11 r64 xmmreg
mem to r32 0100 0RXB 11110011:00001111:00101101:
mod r32 r/m
mem32 to r64 0100 1RXB 1111 0011:0000 1111:0010
1101: mod r64 r/m
CVTTSD2SI—Convert with Truncation Scalar
Double-Precision Floating-Point Value to
Doubleword Integer
xmmreg to r32 0100 0R0B
11110010:00001111:00101100:11 r32
xmmreg
Table B-32. Special Case Instructions Promoted Using REX.W (Contd.)
Instruction and Format Encoding