Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

4-146 Vol. 2B
INSTRUCTION SET REFERENCE, N-Z
Operation
PSADBW instructions when using 64-bit operands:
TEMP0 ← ABS(DEST[7:0]
− SRC[7:0]);
(* Repeat operation for bytes 2 through 6 *)
TEMP7 ← ABS(DEST[63:56]
− SRC[63:56]);
DEST[15:0] ← SUM(TEMP0:TEMP7);
DEST[63:16] ← 000000000000H;
PSADBW instructions when using 128-bit operands:
TEMP0 ← ABS(DEST[7:0]
− SRC[7:0]);
(* Repeat operation for bytes 2 through 14 *)
TEMP15 ← ABS(DEST[127:120]
− SRC[127:120]);
DEST[15:0] ← SUM(TEMP0:TEMP7);
DEST[63:6] ← 000000000000H;
DEST[79:64] ← SUM(TEMP8:TEMP15);
DEST[127:80] ← 000000000000H;
Intel C/C++ Compiler Intrinsic Equivalent
PSADBW __m64_mm_sad_pu8(__m64 a,__m64 b)
PSADBW __m128i _mm_sad_epu8(__m128i a, __m128i b)
Flags Affected
None.
Numeric Exceptions
None.
Figure 4-5. PSADBW Instruction Operation Using 64-bit Operands
X3 X2 X1 X0
SRC
DEST
TEMP
X4X5X6X7
Y3 Y2 Y1 Y0Y4Y5Y6Y7
ABS(X0:Y0)ABS(X7:Y7) ABS(X6:Y6) ABS(X5:Y5) ABS(X4:Y4) ABS(X3:Y3) ABS(X2:Y2) ABS(X1:Y1)
DEST
00H 00H00H00H00H00H
SUM(TEMP7...TEMP0)