Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B B-41

INSTRUCTION FORMATS AND ENCODINGS

memory64 by CL 0100 10XB 1101 0011 : mod 011 r/m

qwordregister by immediate count 0100 100B 1100 0001 : 11 011 qwordreg :

imm8

memory by immediate count 0100 00XB : 1100 000w : mod 011 r/m : imm8

memory64 by immediate count 0100 10XB 1100 0001 : mod 011 r/m : imm8

RDMSR – Read from Model-Specific Register

load ECX-specified register into EDX:EAX 0000 1111 : 0011 0010

RDPMC – Read Performance Monitoring

Counters

load ECX-specified performance counter into

EDX:EAX

0000 1111 : 0011 0011

RDTSC – Read Time-Stamp Counter

read time-stamp counter into EDX:EAX 0000 1111 : 0011 0001

REP INS – Input String

REP LODS – Load String

REP MOVS – Move String

REP OUTS – Output String

REP STOS – Store String

REPE CMPS – Compare String

REPE SCAS – Scan String

REPNE CMPS – Compare String

REPNE SCAS – Scan String

RET – Return from Procedure (to same

segment)

no argument 1100 0011

adding immediate to SP 1100 0010 : 16-bit displacement

RET – Return from Procedure (to other

segment)

intersegment 1100 1011

adding immediate to SP 1100 1010 : 16-bit displacement

Table B-15. General Purpose Instruction Formats and Encodings

for 64-Bit Mode (Contd.)

Instruction and Format Encoding