Intel 64 and IA-32 Architectures Software Developers Manual Volume 2B, Instruction Set Reference, N-Z

Vol. 2B 4-195
INSTRUCTION SET REFERENCE, N-Z
In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to
access additional registers (XMM8-XMM15).
Operation
PSUBSB instruction with 64-bit operands:
DEST[7:0] ← SaturateToSignedByte (DEST[7:0]
− SRC (7:0]);
(* Repeat subtract operation for 2nd through 7th bytes *)
DEST[63:56] ← SaturateToSignedByte (DEST[63:56]
− SRC[63:56] );
PSUBSB instruction with 128-bit operands:
DEST[7:0] ← SaturateToSignedByte (DEST[7:0]
− SRC[7:0]);
(* Repeat subtract operation for 2nd through 14th bytes *)
DEST[127:120] ← SaturateToSignedByte (DEST[111:120]
− SRC[127:120]);
PSUBSW instruction with 64-bit operands
DEST[15:0] ← SaturateToSignedWord (DEST[15:0] − SRC[15:0] );
(* Repeat subtract operation for 2nd and 7th words *)
DEST[63:48] ← SaturateToSignedWord (DEST[63:48]
− SRC[63:48] );
PSUBSW instruction with 128-bit operands
DEST[15:0] ← SaturateToSignedWord (DEST[15:0]
− SRC[15:0]);
(* Repeat subtract operation for 2nd through 7th words *)
DEST[127:112] ← SaturateToSignedWord (DEST[127:112]
− SRC[127:112]);
Intel C/C++ Compiler Intrinsic Equivalents
PSUBSB __m64 _mm_subs_pi8(__m64 m1, __m64 m2)
PSUBSB __m128i _mm_subs_epi8(__m128i m1, __m128i m2)
PSUBSW __m64 _mm_subs_pi16(__m64 m1, __m64 m2)
PSUBSW __m128i _mm_subs_epi16(__m128i m1, __m128i m2)
Flags Affected
None.
Numeric Exceptions
None.
Protected Mode Exceptions
#GP(0) If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.
(128-bit operations only) If a memory operand is not aligned on
a 16-byte boundary, regardless of segment.