Technical product specification

Intel NUC Board DE3815TYBE Technical Product Specification

1.5.1.5.1 Embedded DisplayPort* (eDP) Interface

The Embedded DisplayPort (eDP) flat panel display interface supports the following:

• 1920 x 1080 @ 60 Hz resolution

• 1-lane and 2-lane bandwidth at 1.62 Gb/s or 2.7 Gb/s

• Multiple EDID data source capability (panel, predefined, and custom payloads)

• 3.3 V, 5 V, and 12 V flat panel display voltage flexibility, with up to 2 A current

• 5 V, 12 V, and Vin backlight inverter voltage flexibility, with up to 2 A current

• Backlight inverter signal redundancy on a dedicated header as well as on eDP connector (for

discrete inverter or panel-integrated inverter support using a single cable)

1.5.1.5.2 Configuration Modes

Video mode configuration for eDP displays is supported as follows:

• Automatic panel identification via Extended Display Identification Data (EDID) for panels with

onboard EDID support

• Panel selection from common predefined panel types (without onboard EDID)

• Custom EDID payload installation for ultimate parameter flexibility, allowing custom definition

of EDID data on panels without onboard EDID

In addition, BIOS setup provides the following configuration parameters for internal flat panel

displays:

• Color Depth: allows the system integrator to select whether the panel is 24 bpp with VESA or

JEIDA color mapping, or 18 bpp.

• eDP Interface Type: allows the system integrator to select whether the eDP panel is a 1-lane

or 2-lane display.

• eDP Data Rate: allows the system integrator to select whether the eDP panel runs at 1.62 Gb/s

or 2.7 Gb/s.

• Inverter Frequency and Polarity: allows the system integrator to set the operating frequency

and polarity of the panel inverter board.

• Maximum and Minimum Inverter Current Limit (%): allows the system integrator to set

maximum PWM%, as appropriate, according to the power requirements of the internal flat

panel display and the selected inverter board.

• Panel Power Sequencing: allows the system integrator to adjust panel power sequencing

parameters, if necessary.

NOTE

Support for flat panel display configuration complies with the following:

1. Internal flat panel display connectivity is disabled (and all parameters hidden) by default.

2. Internal flat panel display settings are not exposed through Intel

Integrator Toolkit or Intel

Integrator Assistant GUIs.

3. Internal flat panel display settings will not be overwritten by loading BIOS setup defaults.

4. Internal flat panel display settings will be preserved across BIOS updates.

5. Backlight inverter voltage option “Vin” refers to board input voltage as provided to board

power input connector.