Embedded Voltage Regulator-Down (EmVRD) 11.0 Design Guidelines for Embedded Implementations Supporting PGA478

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Embedded Voltage Regulator-Down (EmVRD) 11.0

January 2007 Design Guidelines for Embedded Implementations

1.0—EmVRD 11.0

1.0 Introduction

1.1 About This Document

This design guide defines the power delivery features necessary to support Intel

processors’ power delivery requirements for embedded computer applications using the

following family of processors:

•Dual-Core Intel

Xeon

Processor LV

•Dual-Core Intel

Xeon

Processor ULV

•Intel

Celeron

Processor 1.66 GHz / 1.83 GHz

All references to “processor(s)” include all of the above processors unless specific

exclusions are mentioned.

This includes design recommendations for DC to DC regulators, which convert the input

supply voltage to a processor consumable voltage (V

) and additional specific feature

set implementation, such as thermal monitoring and dynamic voltage identification.

EmVRD - The Embedded Voltage Regulator-Down (EmVRD) designation of this

document refers to a regulator with all components mounted directly on the

motherboard for intent of supporting a single embedded processor. For platforms

supporting dual embedded processor designs, an additional EmVRD regulator will be

required.

Note: This document does not describe the use of a Voltage Regulator Module (VRM), a

modular pluggable converter.

The EmVRD 11.0 is based on the previous generation enterprise/server VRM/EVRD

10.x specification, but incorporates several functional changes. Hardware solutions for

the voltage regulator are dependent upon the microprocessors to be supported in a

specific motherboard. The EmVRD 11.0 is used to support the Dual-Core Intel

Xeon

Processor LV, and Dual-Core Intel

Xeon

Processor ULV and Intel

Celeron

Processor 1.66 GHz / 1.83 GHz family of processors.

The EmVRD 11.0 controller offers two modes of operation which allows it to incorporate

all of the VRD 10.x and VRM/EVRD 10.x functions plus the following enhancements:

• Extended VRM/EVRD 10.x VID table with a seventh bit for 6.25 mV resolution,

processor will only use VR11.0 VID mode

• Support for a second linear 8-bit VID table with 6.25 mV resolution, 1.6 V

maximum VID, and minimum VID defined as 31.25 mV. The processor will only use

12.5 mV of VID resolution.

• New power-on sequence definition

• Load-line regulation tolerance of ±19 mV

• Integrated thermal monitor circuitry