Embedded Voltage Regulator-Down (EmVRD) 11.0 Design Guidelines for Embedded Implementations Supporting PGA478

Embedded Voltage Regulator-Down (EmVRD) 11.0
January 2007 Design Guidelines for Embedded Implementations
3
—EmVRD 11.0
Contents
1.0 Introduction.................................................................................................................7
1.1 About This Document...........................................................................................7
1.2 Terminology .......................................................................................................8
1.3 Related Documentation......................................................................................10
2.0 Processor V
CC
Requirements .......................................................................................11
2.1 Voltage and Current ..........................................................................................11
2.2 Processor Load Line Definitions ...........................................................................11
2.3 Voltage Tolerance Band (TOB) ............................................................................16
2.3.1 EmVRD Controller Requirements ..............................................................16
2.3.2 Dynamic Voltage Identification (D-VID) TOB ..............................................17
2.3.3 Ripple Voltage .......................................................................................17
2.3.4 Sense Topology Requirements .................................................................17
2.3.5 Error Amp Specification...........................................................................18
2.4 Stability...........................................................................................................18
2.5 Dynamic Voltage Identification............................................................................18
2.5.1 Dynamic-Voltage Identification Functionality..............................................18
2.5.2 D-VID Validation ....................................................................................20
2.5.2.1 VR11 Validation Summary .........................................................20
2.6 Processor V
CC
Overshoot....................................................................................22
2.6.1 Specification Overview............................................................................22
2.6.2 Example: Processor V
CC
Overshoot Test.....................................................25
2.7 EmVRD Output Filter..........................................................................................26
2.7.1 Bulk Decoupling.....................................................................................26
2.7.2 High Frequency Decoupling......................................................................26
3.0 VCCP Requirements................................................................................................... 28
3.1 Electrical Specifications ......................................................................................28
3.2 VCCP Bypass Recommendations..........................................................................29
4.0 Power Sequencing ...................................................................................................... 30
4.1 VR_ENABLE .....................................................................................................30
4.2 Vboot Voltage Level...........................................................................................30
4.3 Under Voltage Lock Out (UVLO) ..........................................................................30
4.4 Soft Start (SS) .................................................................................................31
5.0 EmVRD Current Support..............................................................................................34
5.1 Phase Count Requirement ..................................................................................34
6.0 Control Inputs............................................................................................................35
6.1 Voltage Identification (CPU VID [5:0], EmVRD [6:1]).............................................35
6.1.1 Voltage Identification Table .....................................................................36
6.2 VID_SEL: VID Table Selection.............................................................................38
7.0 Input Voltage and Current ..........................................................................................39
7.1 Input Voltages ..................................................................................................39
7.1.1 Platform Input Voltages...........................................................................39
8.0 Output Protection .......................................................................................................40
8.1 Over-Voltage Protection (OVP)............................................................................40
8.2 Over-Current Protection (OCP)............................................................................40
9.0 Output Indicators .......................................................................................................41
9.1 VR_READY: V
CC
Regulator Is ‘ON’ .......................................................................41
9.2 FORCEPR# and EmVRD Thermal Monitoring..........................................................41