Embedded Voltage Regulator-Down (EmVRD) 11.0 Design Guidelines for Embedded Implementations Supporting PGA478

Embedded Voltage Regulator-Down (EmVRD) 11.0
January 2007 Design Guidelines for Embedded Implementations
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2.0—EmVRD 11.0
Note: EmVRD processor load line calibration with the VTT does not guarantee adequate high
frequency decoupling to reduce package noise. This noise is directly dependent upon
the processor core frequency, so the filter must guarantee adequate decoupling to
support all frequencies the board is to support.
Table 11. Board Decoupling Requirements per CPU
Bypass Caps Value Quantity ESR ESL Style Notes
High Frequency 22 µF 30 3 mΩ 700 pH 0805 Package Ceramic
Bulk 330 µF 6 9 mΩ 1.8 nH 3 pin SMT Poscap