Embedded Voltage Regulator-Down (EmVRD) 11.0 Design Guidelines for Embedded Implementations Supporting PGA478

EmVRD 11.0—2.0

Embedded Voltage Regulator-Down (EmVRD) 11.0

Design Guidelines for Embedded Implementations January 2007

2.6 Processor V

Overshoot

2.6.1 Specification Overview

Intel embedded processors in EmVRD 11.0 systems are capable of tolerating short

transient overshoot events above VID on the Vcc supply that will not impact processor

life span or reliability. Maximum processor Vcc overshoot, VOS, cannot exceed

VID+VOS-MAX. Overshoot duration, TOS, cannot stay above VID for a time more than

TOS-MAX. See Table 9 and Table 10 for details.

Figure 7. Overshoot and Undershoot During Dynamic VID Validation

Table 7. D-VID Validation Summary Table

Parameter Minimum Typical Maximum

VID 0.8375 V - 1.5000 V

Voltage Transition 0.6575 V 0.6625 V 0.6675 V

Transition Time - - 315s

Current Load 5A - VR_TDC

Notes:

1. The absolute maximum core voltage for Dual-Core Intel

Xeon

Processor LV is 1.5 V. The

maximum voltage supported by the VR11 specification is 1.6V.

2. Time is measured from 0.4 V on rising edge of the first D-VID input code to the convergent

Vcc voltage value after the final D-VID code is transmitted. Includes 50 us for final code

settling.

3. Please see the Datasheet for nominal voltage values.

1.5 V

0.8375 V

Transition From Max To Min VID

Transition From Min To Max VID

Limit undershoot of DC

transition to 5mV

Must be compliant to

overshoot specifications

Vcc

1.5 V

0.8375 V

Time (μ

Time (μs)