Datasheet

Dual-Core Intel
®
Itanium
®
Processor 9000 and 9100 Series Datasheet 33
Electrical Specifications
2.8 Recommended Connections for Unused Pins
Pins that are unused in an application environment (as opposed to testing
environment) should be connected to the states listed in Table 2-21. Pins that must be
used in an application are stated as such and do not have a recommended state for
unused connection.
Table 2-21. Connection for Unused Pins
Pins/Pin Groups
Recommended
Connections
Notes
AGTL+ pins H
1, 2
Notes:
1. L = GND, H = V
CTERM
.
2. AGTL+ output signals SBSY[0:1]#, DBSY[0:1]#, and DRDY[0,1]# may be left as N/C
if not used on platform.
HSTL Clock Signals Must be used
All Power Signals Must be used
PWRGOOD Must be used
TAP Signals
TCK L
1, 3
TRST# L
1, 3
3. Can be No-Connect or connected to V
CTERM
via a 100ohm or 150 ohm resistor.
TDI H
1, 3
TDO H
1, 3
TMS H
1, 3
System Management Signals
3.3V GND
SMA[2:0] N/C
SMSC N/C
SMSD N/C
SMWP N/C
THRMALERT# H
1, 4
4. THRMALERT# should be pulled up to 3.3 V through a resistor.
LVTTL Power Pod Signals
OUTEN Must be used
PPODGD# Must be used
PROCPRES# Must be used
Other Pins
N/C N/C
A20M# N/C
IGNNE# N/C
LOCK# N/C
FERR# N/C
TUNER1 N/C or H
3,5
5. With A[21;17] settings to all 0’ or all 1’s, please refer to Table 2-22 for proper
connection.
TUNER2 H
1
TUNER3 N/C or H
3,5