Datasheet

Dual-Core Intel
®
Itanium
®
Processor 9000 and 9100 Series Datasheet 29
Electrical Specifications
The VR shall provide a selectable output voltage controlled via multiple binary weighted
Voltage Identification (VID) inputs. The VID value (high = 1; low = 0) is defined in
Table 2-20. VID pins will be controlled by the processor.
A10 - N10 GND
A11 - N11 Vcore
A12 - N12 GND
A13 - N13 Vcore
A14 - N14 GND
A15 - N15 Vcore
A16 - N16 GND
A17 - N17 Vcore
A18 - N18 GND
A19 - N19 Vcore
A20 - N20 GND
A21 - N21 Vcore
A22 - N22 GND
A23 - N23 Vcore
A24 - N24 GND
A25 - N25 Vcore
A26 - N26 GND
A27 - N27 Vcache
A28 - N28 GND
A29 Vcache_sense
B29 Gnd_sense
C29 Vcore_sense
D29 Vfixed_sense
K29 GND
L29 Reserved
M29 Reserved
N29 OUTEN
A30 - D30 GND
L30 - N30 GND
Table 2-19. Power Connector Pinouts (Sheet 2 of 2)
Power Tab VR Pads Description