Datasheet

Dual-Core Intel
®
Itanium
®
Processor 9000 and 9100 Series Datasheet 17
Electrical Specifications
2.2.2 Signal Descriptions
Appendix A, “Signals Reference”, contains functional descriptions of all system bus
signals and LVTTL power pod signals. Further descriptions of the system management
signals are contained in Chapter 6. The signals listed under the “Power” and “Other”
group are described here:
V
CTERM
System bus termination voltage.
GND System ground.
N/C No connection can be made to these pins.
TERMA, TERMB The processor uses two pins to control the on-die termination
function: TERMA and TERMB. Both of these termination pins
must be pulled to VCTERM in order to terminate the system bus
using the on-die termination resistors. Both of these termination
pins must be pulled to GND in order to use off-die termination.
TUNER1, TUNER2,
TUNER3 The TUNER1 Pin can either be left as a no-connect or left
connected to VCTERM via resistor for the majority of platforms
supporting the Dual-Core Intel Itanium processor 9000 and
9100 series. The TUNER2 resistor is used to control the
termination resistance for the system bus I/O buffers. A lower
resistance will cause a lower on-die termination resistance. On-
die termination mode will only be selected if the TERMA and
TERMB pins are terminated as indicated above. The TUNER3 pin
will not be required for the majority of platforms supporting the
Dual-Core Intel Itanium processor 9000 and 9100 series. The
TUNER3 pin is used only in the case where A[21:17]# are driven
to all zeros or all ones during the configuration cycles at reset.
When all zeros or all ones are observed by the processor the
presence of the TUNER3 and TUNER1 pins is used to determine
system bus frequency. See Table 2-22 for the various TUNER pin
combinations and resulting system bus frequency and slew rate
combination.
VCCMON, VSSMON These pins allows remote measurement of on-die Vcore voltage.
No connections that constitute a current load can be made to
these pins.
Table 2-2. Nominal Resistance Values for Tuner1, Tuner2, and Tuner3
400 MHz
5-Load Platform (Ohms)
400 MHz
3-Load Platform (Ohms)
533 MHz
3-Load Platform (Ohms)
Tuner1: NC
1
Tuner2: 150
Tuner3: NC
1
Notes:
1. Depending on system configuration, the processor may or may not require a resistor on the
TUNER pin. OEMs may leave the pin unconnected or connect it to VCTERM through a 150
or 100 ohm resistor. If A[21:17]:# are driven to all 0’s or all 1’s at reset, see Table 2-22
for proper use of the TUNER Pins.
Tuner1: NC
1
Tuner2: 150
Tuner3: NC
1
Tuner1: NC
1
Tuner2: 150
Tuner3: NC
1