Datasheet

106 Dual-Core Intel
®
Itanium
®
Processor 9000 and 9100 Series Datasheet
Signals Reference
ID[9:0]# Low BCLKp Defer IDS#, IDS#+1
IDS# Low BCLKp Defer Always
INIT# Low Asynch Exec Control Always
1
INT (LINT0) High Asynch Exec Control
IP[1:0]# Low BCLKp System Bus IDS#+1
NMI (LINT1) High Asynch Exec Control
RESET# Low BCLKp Control Always
RS[2:0]# Low BCLKp Response Always
RSP# Low BCLKp Response Always
PMI# Low Asynch Exec Control
PWRGOOD High Asynch Control —
TCK High — Diagnostic Always
TDI High TCK Diagnostic Always
TMS High TCK Diagnostic Always
TRST# Low Asynch Diagnostic Always
TRDY# Low BCLKp Response Response Phase
Notes:
1. Synchronous assertion with asserted RS[2:0]# guarantees synchronization.
Table A-14. Input/Output Signals (Single Driver) (Sheet 1 of 2)
Name Active Level Clock Signal Group Qualified
A[49:3]# Low BCLKp Request ADS#, ADS#+1
ADS# Low BCLKp Request Always
AP[1:0]# Low BCLKp Request ADS#, ADS#+1
ASZ[1:0]# Low BCLKp System Bus ADS#
ATTR[3:0]# Low BCLKp System Bus ADS#+1
BE[7:0]# Low BCLKp System Bus ADS#+1
BR0# Low BCLKp System Bus Always
BPM[5:0]# Low BCLKp Diagnostic Always
CCL# Low BCLKp System Bus ADS#+1
D[127:0]# Low BCLKp Data DRDY#
DBSY# Low BCLKp Data Always
D/C# Low BCLKp System Bus ADS#
DEN# Low BCLKp System Bus ADS#+1
DEP[15:0]# Low BCLKp System Bus DRDY#
DID[9:0]# Low BCLKp System Bus ADS#+1
DRDY# Low BCLKp Data Always
DPS# Low BCLKp System Bus ADS#+1
DSZ[1:0]# Low BCLKp System Bus ADS#+1
EXF[4:0]# Low BCLKp System Bus ADS#+1
FCL# Low BCLKp System Bus ADS#+1
LEN[2:0]# Low BCLKp System Bus ADS#+1
OWN# Low BCLKp System Bus ADS#+1
Table A-13. Input Signals (Sheet 2 of 2)
Name Active Level Clock Signal Group Qualified