Datasheet

Processor Core
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 89
• Support for Paging included although not required for the Intel
®
Quark™
microcontroller D2000 use case
o 2 Entry Instruction TLB (Translation Look-aside Buffer)
o 2 Entry Data TLB (Translation Look-aside Buffer)
• Single cycle 32bx32b  32b Multiplier (IMUL Instruction)
• Integrated Intel
®
Quark™ microcontroller D2000 Interrupt Controller (MVIC) with
support for 32 IRQs – some may be unused in Intel
®
Quark™ microcontroller
D2000.
• Supports C0 and C1 Processor Power States
o Supports Interrupt as Wake Event from C1
o Both Time Stamp Counter and LVT Timer run in C1 State
o STOP CLOCK feature is not supported and the xstpreqnn toplevel input is
tied off.
o Intel
®
Quark™ microcontroller D2000 implements C2 capability of
processor by clock gating processor upon detecting HALT instruction
o Time Stamp Counter and LVT Timer do not run when Intel
®
Quark™
microcontroller D2000 clock gates processor
Note: The processor does not provide an x87 Floating Point Unit (FPU) and does not support
x87 FPU instructions.