Datasheet
Introduction
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
8 Document Number: 333577-002EN
15.3.1.5 Slave Enable Register (SER) ..................................... 238
15.3.1.6 Baud Rate Select (BAUDR) ....................................... 239
15.3.1.7 Transmit FIFO Threshold Level (TXFTLR) .................... 240
15.3.1.8 Receive FIFO Threshold Level (RXFTLR) ..................... 240
15.3.1.9 Transmit FIFO Level Register (TXFLR) ........................ 241
15.3.1.10 Receive FIFO Level Register (RXFLR) ......................... 242
15.3.1.11 Status Register (SR) ............................................... 242
15.3.1.12 Interrupt Mask Register (IMR) .................................. 244
15.3.1.13 Interrupt Status Register (ISR) ................................. 245
15.3.1.14 Raw Interrupt Status Register (RISR) ........................ 246
15.3.1.15 Transmit FIFO Overflow Interrupt Clear Register
(TXOICR) .............................................................. 247
15.3.1.16 Receive FIFO Overflow Interrupt Clear Register
(RXOICR) .............................................................. 247
15.3.1.17 Receive FIFO Underflow Interrupt Clear Register
(RXUICR) .............................................................. 248
15.3.1.18 Multi-Master Interrupt Clear Register (MSTICR) ........... 248
15.3.1.19 Interrupt Clear Register (ICR) ................................... 249
15.3.1.20 DMA Control Register (DMACR) ................................. 249
15.3.1.21 DMA Transmit Data Level (DMATDLR) ........................ 250
15.3.1.22 DMA Receive Data Level (DMARDLR) ......................... 250
15.3.1.23 Identification Register (IDR) ..................................... 251
15.3.1.24 coreKit Version ID register (SSI_COMP_VERSION) ....... 251
15.3.1.25 Data Register (DR0) ................................................ 252
15.3.1.26 Data Register (DR1) ................................................ 252
15.3.1.27 Data Register (DR2) ................................................ 253
15.3.1.28 Data Register (DR3) ................................................ 254
15.3.1.29 Data Register (DR4) ................................................ 254
15.3.1.30 Data Register (DR5) ................................................ 255
15.3.1.31 Data Register (DR6) ................................................ 256
15.3.1.32 Data Register (DR7) ................................................ 256
15.3.1.33 Data Register (DR8) ................................................ 257
15.3.1.34 Data Register (DR9) ................................................ 258
15.3.1.35 Data Register (DR10) .............................................. 258
15.3.1.36 Data Register (DR11) .............................................. 259
15.3.1.37 Data Register (DR12) .............................................. 260
15.3.1.38 Data Register (DR13) .............................................. 260
15.3.1.39 Data Register (DR14) .............................................. 261
15.3.1.40 Data Register (DR15) .............................................. 262
15.3.1.41 Data Register (DR16) .............................................. 263
15.3.1.42 Data Register (DR17) .............................................. 263
15.3.1.43 Data Register (DR18) .............................................. 264
15.3.1.44 Data Register (DR19) .............................................. 265
15.3.1.45 Data Register (DR20) .............................................. 265
15.3.1.46 Data Register (DR21) .............................................. 266
15.3.1.47 Data Register (DR22) .............................................. 267
15.3.1.48 Data Register (DR23) .............................................. 267
15.3.1.49 Data Register (DR24) .............................................. 268
15.3.1.50 Data Register (DR25) .............................................. 269
15.3.1.51 Data Register (DR26) .............................................. 269
15.3.1.52 Data Register (DR27) .............................................. 270
15.3.1.53 Data Register (DR28) .............................................. 271
15.3.1.54 Data Register (DR29) .............................................. 271
15.3.1.55 Data Register (DR30) .............................................. 272
15.3.1.56 Data Register (DR31) .............................................. 273