Datasheet

Power Management
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
66 Document Number: 333577-002EN
8.1.6 32 MHz OSC
Table 18. 32 MHz OSC Power States
Power State Definition Max
Current
Entry
Latency
Exit
Latency
How Triggered
ON-SI Silicon RC
Oscillator
mode.
Oscillator is
outputting the
configured
clock
frequency at
+/- 2%
accuracy.
450 uA
@ 32
MHz;
180 uA
@ 4
MHz.
2 usec - Writing to
OSC0_CFG0/1
register
ON-XTAL Crystal
Oscillator
mode.
Oscillator is
outputting the
configured
clock
frequency
(based on
crystal
connected) at
+/- 100 ppm
accuracy.
4000 uA
@ 32
MHz;
3000 uA
@ 20
MHz.
2000
usec
- Writing to
OSC0_CFG0/1
register
OFF Powered down
mode.
300 nA - - Writing to
OSC0_CFG1.OSC0_PD
register
8.1.7 SRAM
Table 19. SRAM Power States
Power State Definition Max
Current
Entry
Latency
Exit
Latency
How
Triggered
NRML "Normal Operation Mode:
this mode corresponds to
read (write) operation at
every clock cycle. This
mode is activated by a
CSN at low level at the
rising edge of CK."
- 0 0 Chip Select
CSN=L to
SRAM
asserted in
a clock
cycle for
write or
read
operation