Datasheet

Power Management
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 65
8.1.4 Comparator
Table 16. Comparator (CMP) Power States
Power State Definition Max
Current
Entry
Latency
Exit
Latency
How
Triggered
ON Normal operation.
CMP_PWR=H.
Fast:
20.5 uA
@ avdd,
0.82 uA
@ dvdd.
Slow:
2.5 uA
@ avdd,
1.4 uA
@ dvdd.
- - Writing to
CMP_PWR
register
OFF Powered down state.
CMP_PWR=L.
2.7 nA - 0.9 us Writing to
CMP_PWR
register
8.1.5 32.768 kHz OSC
Table 17. 32.768 kHz OSC Power States
Power State Definition Max
Current
Entry
Latency
Exit
Latency
How
Triggered
ON Normal mode. Crystal
Oscillator is outputting
32 kHz clock
40 nA
typ, 150
nA max.
350
msec
- Writing to
OSC1_CFG0
register
OFF Disabled mode. Output
is not oscillating but at
predefined value.
- - - Writing to
OSC1_CFG0
register