Datasheet

Mapping Address Spaces
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
54 Document Number: 333577-002EN
Table 10 SoC Memory Map
Notes:
LMT Reset Vector is located in OTP Code region at address 0x0000_0150
All memory regions not covered in the SoC Memory Map are reserved.
Reserved regions are unused. Reserved sections have been inserted to allow
space for memory/peripheral address space to increase in derivative SoCs
without re-arranging the address map. Access to Reserved regions trigger an
interrupt to support debug of out of bound accesses. Writes to such regions
have no effect while reads return a definite value depending on the interface.
AHB Fabric provides 4 HSELs to Flash Memory subsystem: Flash CREGs for
configuration, Instruction Flash, OTP Code and OTP Flash Data.
Memory accesses are routed by the IO fabric based on fixed memory ranges that map
to the SoC peripherals. These peripherals are: ADC, I2C, UART*, SPI*, GPIO, APB
Timer, RTC and Watchdog Timer. The fixed regions assigned to each peripheral are
listed in the table above. See the register maps of all peripheral devices for details.
Function Start Address End Address Size
LAPIC 0xFEE0_0000 0xFEE0_0FFF 4KB
IOAPIC 0xFEC0_0000 0xFECF_FFFF 1MB
SCSS (System Control Subsystem) 0xB080_0000 0xB080_3FFF 16KB
DMA 0xB070_0000 0xB070_0FFF 4KB
Internal SRAM Configuration 0xB040_0000 0xB040_03FF 1KB
Flash Configuration 0xB010_0000 0xB010_03FF 1KB
ADC 0xB000_4000 0xB000_43FF 1KB
I2C_0 0xB000_2800 0xB000_2BFF 1KB
UART_B 0xB000_2400 0xB000_27FF 1KB
UART_A 0xB000_2000 0xB000_23FF 1KB
SPI_S 0xB000_1800 0xB000_1BFF 1KB
SPI_M0 0xB000_1000 0xB000_13FF 1KB
GPIO 0xB000_0C00 0xB000_0FFF 1KB
APB Timer 0xB000_0800 0xB000_0BFF 1KB
RTC 0xB000_0400 0xB000_07FF 1KB
Watchdog Timer 0xB000_0000 0xB000_03FF 1KB
SRAM (DTCM & AHB) 0x0028_0000 0x0028_1FFF 8KB
OTP Data (AHB) 0x0020_0000 0x0020_0FFF 4KB
Flash Code (ITCM & AHB) 0x0018_0000 0x0018_7FFF 32KB
OTP Code (ITCM & AHB) 0x0000_0000 0x0000_1FFF 8KB