Datasheet

System Control Subsystem
Intel
®
Quark™ microcontroller D2000
Datasheet January 2016
452 Document Number: 333577-002EN
Bits Access
Type
Default Description PowerWell ResetSignal
11100b : 3.00V
11101b : 3.10V
11110b : 3.20V
11111b : 3.30V
Values between 00000b and
00111b are illegal.
24.3.1.54 Power Management Wait (PM_WAIT)
MEM Offset (00000000) 558h
Security_PolicyGroup
IntelRsvd False
Size 32 bits
Default 0000_000Fh
Bits Access
Type
Default Description PowerWell ResetSignal
31:8 RO 24'h000000 RSVD (RSVD)
Reserved
7:0 RW/L 8'h0f Voltage Strobe Wait
Duration (VSTRB_WAIT)
Determines the number of
clock cycles the hardware
state machine waits after
using voltage strobe to
program a new output
voltage for the AON
regulator.
When the voltage value is
changed, this field allows
time for the new voltage
level to be reached before
the AON domain is released
from reset.
The delay is added by
loading a counter that runs
off a sys_clk and then
waiting for the counter to
expire.
00h : Wait 0 Clock Cycles
01h : Wait 1 Clock Cycle
02h : Wait 2 Clock Cycles
.
.
FEh : Wait 65,534 Clock
Cycles
FFh : Wait 65,535 Clock
Cycles
por_rst_n