Datasheet
System Control Subsystem
Intel
®
Quark™ microcontroller D2000
January 2016 Datasheet
Document Number: 333577-002EN 451
Bits Access
Type
Default Description PowerWell ResetSignal
8 RW/P/L 1'h0 Volatge Regulator Select
during low power state.
(VREG_SEL)
0: eSR Switching Regulator
is kept enabled during low
power state.
1: eSR Switching Regulator
disabled and qLR Linear
Regulator enabled (retention
mode)
7:6 RO 2'h0 RSVD (RSVD)
Reserved
5 RW/P/L 1'h0 Voltage Select Strobe
(VSTRB)
Enables output voltage
programming using VSEL,
minimum high pulse width
requirement is 1us.
The VSEL value is strobed
only on a rising edge of
VSTRB
4:0 RW/P/L 5'b10000 Voltage Select (VSEL)
These control bits are used
to program the output
voltage in conjunction with
VSTRB
01000b : 1.20V
01001b : 1.25V
01010b : 1.30V
01011b : 1.35V
01100b : 1.40V
01101b : 1.50V
01110b : 1.60V
01111b : 1.70V
10000b : 1.80V
10001b : 1.90V
10010b : 2.00V
10011b : 2.10V
10100b : 2.20V
10101b : 2.30V
10110b : 2.40V
10111b : 2.50V
11000b : 2.60V
11001b : 2.70V
11010b : 2.80V
11011b : 2.90V